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Instructions Aiwa, Modèle CSD-TD53

Fabricant : Aiwa
Taille : 3.69 mb
Nom Fichier :
Langue d'enseignement: en
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Facilité d'utilisation


(Connect to 0V when not used). 2 TAI I For PLL. Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V. Phase comparator output pin to control external VCO. GND pin for built-in VCO. Be sure to connect to 0V. Pin to which external resistor adjusting the PD0 output current. Power supply pin for built-in VCO. Pin for VCO frequency range adjustment. 3 PDO O 4 VVSS — 5 ISET I 6 VVDD — 7 FR I 8 VSS — Digital system GND. Be sure to connect to 0V. 9 EFMO O For slice level control. EFM signal output pin. EFM signal input pin.10 EFMIN I 11 T2 I Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V. 12, 13 CLV+, CLKO Disc motor control output. Three level output is possible using command. 14 ___ V/P O Rough servo or phase control automatic selection monitoring output pin. Rough servo at H. Phase servo at L. 15 HFL I Track detect signal input pin. Schmidt input. 16 TES I Tracking error signal input pin. Schmidt input. 17 TOFF O Tracking OFF output pin. 18 TGL O Tracking gain selection output pin. Gain boost at L. 19, 20 JP+, JPO Track jump control signal output pin. Three level output is possible using command. 21 PCK O EFM data playback clock monitoring pin 4.3218 MHz when phase is locked in. 22 FSEQ O Sync signal detection output pin. H when the sync signal which is detected from EFM signal and thesync signal which is internally generated agree. 23 VDD — Digital system power supply pin. 24 SL+ O Moves the sled to outer circumference. 25 SLO Moves the sled to inner circumference. 26 CONT3 (NC) — Not connected. 27 PUIN I CD pickup inner switch detection. 28 _______ RW O Read, wright signal. 29 EMPH O De-emphasis monitor output pin. De-emphasis disc is being played back at H. 30 C2F O C2 flag output pin. 31 DOUT O DIGITAL OUT output pin. (EIAJ format). 32, 33 T3, T4 I Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V. 34 N.C. — Not used. Set the pin to open. 35 MUTEL O L-channel 1-bit DAC. L-channel mute output pin. L-channel power supply pin. L-channel output pin. L-channel GND. Be sure to connect to 0V. 36 LVDD — 37 LCHO O 38 LVSS — 39 RVSS — R-channel 1-bit DAC. R-channel GND. Be sure to connect to 0V. R-channel output pin. R-channel power supply pin. R-channel mute output pin. 40 RCHO O 41 RVDD — 42 MUTER O 31 Pin No. Pin Name I/O Description 43 XVDD — Crystal oscillator power supply pin. 44 XOUT O Pin to which external 16.9344 MHz crystal oscillator is connected. 45 XIN I 46 XVSS — Crystal oscillator GND pin. Be sure to connect to 0V. 47 SBSY O Subcode block sync signal output pin. 48 EFLG O C1, C2, single and dual correction monitoring pin. 49 PW O Subcode P, Q, R, S, T, U and W output pin. 50 SFSY O Subcode frame sync signal output pin. Falls down when subcode enters standby. 51 SBCK I Subcode read clock input pin. Schmidt input. (Be sure to connected to 0V when not in use.) 52 FSX O Pin outputting the 7.35 kHz sync signal which is generated by dividing frequency of crystal oscillator. 53 WRQ O Subcode Q output standby output pin. 54 RWC I Read/write control input pin. Schmidt input. 55 SQOUT O Subcode Q output pin. 56 COIN I Command input pin from microprocessor. 57 ___________ CQCK I Command input read clock or subcode read input clock from SQOUT pin 58 RES I LC78622 reset input pin. Set this pin to L once when the main power is turned on. 59 T11 O Test signal output pin. Use this pin as open (normally L output). 60 16M O 16.9344 MHz output pin. 61 4.2M O 4.2336 MHz output pin. 62 T5 I Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V. 63 ______ CS I Chip select signal input pin with built-in pull-down resistor. Be sure to connect to 0V while it is not controlling. 64 T1 I Test signal input pin without built-in pull-down resistor. Be sure to connect to 0V. 32 IC, LC867132V- Pin No. Pin Name I/O Description 1 O-RMC/CE O CD read/write control 2 O-DATA O Data output to M62495FP. 3 O-CLK O Output CLK to tuner PLL.(Not 4 — — Not Connected. O-CLK SFT O Clock shift output of the microcomputer. 6 I-HOLD I Hold status detection. 7 RST I Microcomputer reset. 8 XT1 (IN) I Connected to 32.768KHZ crystal oscillator. 9 XT2 (OUT) O VSS1 — GND. 11 CF1 (IN) I Connected to 6MHZ Ceramic Filter. 12 CF2 (OUT) O 13 VDD1 — Power supply for microcomputer (+5V). 14 I-ST IND I FM STEREO status input. I-KEYO I KEY AD input. 16 I-CD SW I CD DOOR SW status detection input. 17 I-KEY1 I KEY AD input. 18 I-MOTOR I DECK MECHA MOTOR status input. 19 I-REC I REC status input. I-FM/AM I FM, AM status input. (Not connected) 21 I-TU DO I Data input from tuner PLL.(Not connected) 22 O-BASS LED O BASS LED ON/OFF control output. 23 O-QS LED O Q-Sound LED ON/OFF control output. 24 O-DUBB LED O LED control output used for high-speed dubbing. O-INT O INT DIODE MATRIX detection output.(Not connected) 26 I-DRF I CD RF level detection input. 27 I-WRQ I CD sub-code Q standby input. 28 I-REMO I Remote control input. 29 S0/PA0 O LCD segment outpu...

Ce manuel est également adapté pour les modèles :
CD-joueurs - CSD-TD52 (3.69 mb)
CD-joueurs - CSD-TD51 (3.69 mb)

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